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  ? semiconductor components industries, llc, 2011 september, 2011 ? rev. 6 1 publication order number: nthd4102p/d nthd4102p power mosfet ? 20 v, ? 4.1 a, dual p ? channel chipfet  features ? offers an ultra low r ds(on) solution in the chipfet package ? miniature chipfet package 40% smaller footprint than tsop ? 6 ? low profile (<1.1 mm) allows it to fit easily into extremely thin environments such as portable electronics ? simplifies circuit design since additional boost circuits for gate voltages are not required ? operated at standard logic level gate drive, facilitating future migration to lower levels using the same basic topology ? pb ? free package is available applications ? optimized for battery and load management applications in portable equipment such as mp3 players, cell phones, and pdas ? charge control in battery chargers ? buck and boost converters maximum ratings (t j = 25 c unless otherwise noted) parameter symbol value unit drain ? to ? source voltage v dss ? 20 v gate ? to ? source voltage v gs  8.0 v continuous drain current (note 1) steady state t a = 25 c i d ? 2.9 a t a = 85 c ? 2.1 t 10 s t a = 25 c ? 4.1 power dissipation (note 1) steady state t a = 25 c p d 1.1 w t 10 s 2.1 pulsed drain current t p =10  s i dm ? 16 a operating junction and storage temperature t j , t stg ? 55 to 150 c source current (body diode) i s ? 1.1 a lead temperature for soldering purposes (1/8? from case for 10 s) t l 260 c thermal resistance ratings parameter symbol max unit junction ? to ? ambient, steady state (note 1) r  ja 113 c/w junction ? to ? ambient, t 10s (note 1) 60 stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. surface mounted on fr4 board using 1 in sq pad size (cu area = 1.127 in sq [1 oz] including traces) marking diagram 1 2 3 4 s 1 g 1 s 2 g 2 d 1 d 1 d 2 d 2 pin connections 8 7 6 5 5 6 7 81 2 3 4 c7 m  c7 = specific device code m = month code  = pb ? free package p ? channel mosfet device package shipping ? ordering information nthd4102pt1 chipfet s 1 g 1 d 1 p ? channel mosfet s 2 g 2 d 2 v (br)dss r ds(on) typ i d max ? 20 v 64 m  @ ? 4.5 v ? 4.1 a 85 m  @ ? 2.5 v 120 m  @ ? 1.8 v nthd4102pt1g chipfet (pb ? free) 3000/tape & reel 3000/tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our t ape and reel packaging specifications brochure, brd8011/d. chipfet case 1206a style 2 http://onsemi.com
nthd4102p http://onsemi.com 2 electrical characteristics (t j = 25 c unless otherwise noted) characteristic symbol test condition min typ max unit off characteristics drain ? to ? source breakdown voltage v (br)dss v gs = 0 v, i d = ? 250  a ? 20 v drain ? to ? source breakdown voltage temperature coefficient v (br)dss/ t j ? 15 mv/ c zero gate voltage drain current i dss v gs = 0 v v ds = ? 16 v t j = 25 c ? 1.0  a t j = 85 c ? 5.0 gate ? to ? source leakage current i gss v ds = 0 v, v gs =  8.0 v  100 na on characteristics (note 2) gate threshold voltage v gs(th) v gs = v ds, i d = ? 250  a ? 0.45 ? 1.5 v gate threshold temperature coefficient v gs(th)/ t j 2.7 mv/ c drain ? to ? source on resistance r ds(on) v gs = ? 4.5 v, i d = ? 2.9 a 64 80 m  v gs = ? 2.5 v, i d = ? 2.2 a 85 110 v ds = ? 1.8 v, i d = ? 1.0 a 120 170 forward transconductance g fs v ds = ? 10 v, i d = ? 2.9 a 7.0 s charges, capacitances, and gate resistance input capacitance c iss v gs = 0 v, f = 1.0 mhz, v ds = ? 16 v 750 pf output capacitance c oss 100 reverse transfer capacitance c rss 45 total gate charge q g(tot) v gs = ? 4.5 v, v ds = ? 16 v, i d = ? 2.6 a 7.6 8.6 nc gate ? to ? source charge q gs 1.3 gate ? to ? drain charge q gd 2.6 switching characteristics (note 3) turn ? on delay time t d(on) v gs = ? 4.5 v, v dd = ? 16 v, i d = ? 2.6 a, r g = 2.0  5.5 10 ns rise time t r 12 25 turn ? off delay time t d(off) 32 40 fall time t f 23 35 drain ? source diode characteristics forward diode voltage v sd v gs = 0 v, i s = ? 1.1 a ? 0.8 ? 1.2 v reverse recovery time t rr v gs = 0 v, di s /dt = 100 a/  s, i s = 1.0 a 20 40 ns charge time ta 15 discharge time tb 5 reverse recovery charge q rr 0.01  c 2. pulse test: pulse width 300  s, duty cycle 2% 3. switching characteristics are independent of operating junction temperatures
nthd4102p http://onsemi.com 3 typical performance curves (t j = 25 c unless otherwise noted) 125 c 0 10 5 8 6 3 2 ? v ds , drain ? to ? source voltage (volts) ? i d, drain current (amps) 6 2 0 1 figure 1. on ? region characteristics 0 1.5 12 6 4 2 0.5 0 2.5 figure 2. transfer characteristics ? v gs , gate ? to ? source voltage (volts) 0.04 6 0.08 0 figure 3. on ? resistance vs. drain current and gate voltage ? i d, drain current (amps) r ds(on), drain ? to ? source resistance (  ) ? i d, drain current (amps) figure 4. on ? resistance variation with temperature t j , junction temperature ( c) figure 5. drain ? to ? source leakage current vs. voltage t j = 25 c 0.2 23 t j = ? 55 c t j = 25 c v gs = ? 4.5 v 4 25 c ? 1.4 v ? 1.6 v ? 2.4 v ? 1.8 v 78 0.12 v gs = ? 10 v to ? 2.8 v 38 10 ? v ds, drain ? to ? source voltage (volts) 10000 0.1 ? i dss , leakage (na) v gs = ? 4.5 v 1000 1 100 v gs = ? 2.5 v 46 4 8 0.16 5 t j = 100 c t j = 125 c 2 9 7 5 1 3 4 9 5 3 1 7 ? 50 0 ? 25 25 1.3 1.1 0.9 0.7 0.5 50 125 100 75 150 r ds(on), drain ? to ? source resistance (normalized) 1.5 v gs = 0 v 3 3.5 0.02 0.06 0.18 0.1 0.14 4 57
nthd4102p http://onsemi.com 4 typical performance curves (t j = 25 c unless otherwise noted) 0 10 4 600 400 200 0 8 gate ? to ? source or drain ? to ? source voltage (volts) c, capacitance (pf) 03 2 4 1 0 q g , total gate charge (nc) ? v gs, gate ? to ? source voltage (volts) t j = 25 c c oss c iss c rss i d = ? 2.7 a t j = 25 c 1000 6 5 2 3 q2 q1 10 1 10 1 100 r g , gate resistance (ohms) t, time (ns) v dd = ? 10 v i d = ? 1.0 a v gs = ? 4.5 v 1000 800 5 t d(off) t d(on) t f t r ? v gs ? v ds 6 4 18 0.9 0 ? v sd , source ? to ? drain voltage (volts) ? i s , source current (amps) v gs = 0 v t j = 25 c 1.2 0.5 0.4 1 5 figure 6. capacitance variation figure 7. gate ? to ? source and drain ? to ? source voltage vs. total gate charge figure 8. resistive switching time variation vs. gate resistance figure 9. diode forward voltage vs. current figure 10. maximum rated forward biased safe operating area 0.1 1 100 ? v ds , drain ? to ? source voltage (volts) 0.01 100 ? i d , drain current (amps) r ds(on) limit thermal limit package limit 10 10 v gs = ? 8 v single pulse t c = 25 c 1 ms 100  s dc 10  s 2 700 500 300 100 900 7 qt 100 0.6 0.8 0.7 0.1 1 12 14 16 18 20 ? v ds , drain ? to ? source voltage (volts) 2 3 4 1.0 1.1 10 ms
nthd4102p http://onsemi.com 5 package dimensions chipfet  case 1206a ? 03 issue k basic *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* style 2: pin 1. source 1 2. gate 1 3. source 2 4. gate 2 5. drain 2 6. drain 2 7. drain 1 8. drain 1 e a b e e1 d 1234 8765 c l 1 2 3 4 8 7 6 5 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. mold gate burrs shall not exceed 0.13 mm per side. 4. leadframe to molded body offset in horizontal and vertical shall not exceed 0.08 mm. 5. dimensions a and b exclusive of mold gate burrs. 6. no mold flash allowed on the top and bottom lead surface. 0.05 (0.002) dim a min nom max min millimeters 1.00 1.05 1.10 0.039 inches b 0.25 0.30 0.35 0.010 c 0.10 0.15 0.20 0.004 d 2.95 3.05 3.10 0.116 e 1.55 1.65 1.70 0.061 e 0.65 bsc e1 0.55 bsc l 0.28 0.35 0.42 0.011 0.041 0.043 0.012 0.014 0.006 0.008 0.120 0.122 0.065 0.067 0.025 bsc 0.022 bsc 0.014 0.017 nom max 1.80 1.90 2.00 0.071 0.075 0.079 h e 5 nom  5 nom h e  reset 0.457 0.018 2.032 0.08 0.65 0.025 pitch 0.66 0.026  mm inches  2.362 0.093 1 8x 8x on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada japan : on semiconductor, japan customer focus center 2 ? 9 ? 1 kamimeguro, meguro ? ku, tokyo, japan 153 ? 0051 phone : 81 ? 3 ? 5773 ? 3850 nthd4102p/d chipfet is a trademark of vishay siliconix. literature fulfillment : literature distribution center for on semiconductor p.o. box 61312, phoenix, arizona 85082 ? 1312 usa phone : 480 ? 829 ? 7710 or 800 ? 344 ? 3860 toll free usa/canada fax : 480 ? 829 ? 7709 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : http://onsemi.com order literature : http://www.onsemi.com/litorder for additional information, please contact your local sales representative.


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